With this function you can construct your weekly calendar of lessons, which is customized on the basis of the courses that you intend to follow. Warning: the personal schedule does not replace the presentation of the study plan! It's an informal tool that can help you better manage the organization of class attendance before the study plan presentation. After the study plan presentation we recommend you to use the Lecture timetable service in your Online Services.
To create your customized schedule follow these instructions:
- Click on the "Enable" link to proceed. You will be asked your surname and first name in order to determine your alphabetic grouping.
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To add or remove courses from your personal schedule, use the small icons which are found next to the courses:
addition of the course
removal of the course
selection of the section of the Laboratory of Architecture (Note: the effective area in which the teaching will be carried out will be determined after the presentation of the Study Plans)
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The sidebar on the left displays the number of lessons included in schedule.
There are also these commands:
View the schedule: allows the viewing of the weekly synoptic schedule
Delete the schedule: cancels the selections made
When you have finished the entry, you can print the calendar you have made.
Semester (Sem) | 1 | First Semester | 2 | Second Semester | A | Annual course | (1) | First Half-semester | (2) | Second Half-semester |
Language
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Course completely offered in italian
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Course completely offered in english
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Not available
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Note on the teaching activities
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In case of structured courses taught by more lecturers, the number of students enrolled is related to the individual lecturer module, while the students opinion of the teaching is related to the course as a whole.
The data related to the last academic years (number of students enrolled and students opinion of the teaching) have not yet been defined.
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Information on didactic, research and institutional assignments on this page are certified by the University; more information, prepared by the lecturer, are available on the personal web page and in the curriculum vitae indicated on this webpage.
Office hours | Department | Floor | Office | Day | Timetable | Telephone | Fax | Notes |
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DEI | --- | --- | Monday | From 14:00 To 18:00 | 6117 | --- | --- |
| E-mail | andrea.lacaita@polimi.it | Personal website | --- |
List of publications and reserach products for the year 2025 (Show all details | Hide all details) |
Type |
Title of the Publicaiton/Product |
Journal Articles |
A 2-GS/s Time-Interleaved ADC With Embedded Background Calibrations and a Novel Reference Buffer for Reduced Inter-Channel Crosstalk (Show >>)(Hide <<)
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Author/s |
Ricci, Luca; Be', Gabriele; Rocco, Michele; Scaletti, Lorenzo; Zanoletti, Gabriele; Bertulessi, Luca; Lacaita, Andrea; Levantino, Salvatore; Samori, Carlo; Bonfanti, ANDREA GIOVANNI |
Title of the review |
IEEE JOURNAL OF SOLID-STATE CIRCUITS (ISSN: 1558-173X) |
Volume |
60 |
Brochure |
-- |
Pages |
456 - 468 |
Item link |
http://hdl.handle.net/11311/1271263 |
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List of publications and reserach products for the year 2024 (Show all details | Hide all details) |
Type |
Title of the Publicaiton/Product |
Conference proceedings |
10.1 An 8.75GHz Fractional-N Digital PLL with a Reverse-Concavity Variable-Slope DTC Achieving 57.3fsrms Integrated Jitter and −252.4dB FoM (Show >>)(Hide <<)
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Author/s |
Rossoni, Michele; Dartizio, Simone Mattia; Tesolin, Francesco; Castoro, Giacomo; Dell'Orto, Riccardo; Samori, Carlo; Lacaita, Andrea Leonardo; Levantino, Salvatore |
Title of the convention |
International Solid-State Circuits Conference (ISSCC) |
Location of the convention |
San Francisco (CA, USA) |
Title of the review |
--
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Pages |
188 - 190 |
Item link |
http://hdl.handle.net/11311/1269140 |
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10.6 A 10GHz FMCW Modulator Achieving 680MHz/μs Chirp Slope and 150kHz rms Frequency Error Based on a Digital-PLL with a Non-Uniform Piecewise-Parabolic Digital Predistortion (Show >>)(Hide <<)
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Author/s |
Tesolin, Francesco; Dartizio, Simone Mattia; Castoro, Giacomo; Buccoleri, Francesco; Rossoni, Michele; Cherniak, Dmytro; Samori, Carlo; Lacaita, Andrea Leonardo; Levantino, Salvatore |
Title of the convention |
IEEE International Solid-State Circuits Conference (ISSCC) |
Location of the convention |
San Francisco (CA, USA) |
Title of the review |
--
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Pages |
198 - 200 |
Item link |
http://hdl.handle.net/11311/1269141 |
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A 59.3fs Jitter and -62.1dBc Fractional-Spur Digital PLL Based on a Multi-Edge Power-Gating Phase-Detector (Show >>)(Hide <<)
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Author/s |
Dartizio, S. M.; Rossoni, M.; Tesolin, F.; Castoro, G.; Samori, C.; Lacaita, A. L.; Levantino, S. |
Title of the convention |
44th Annual IEEE Custom Integrated Circuits Conference, CICC 2024 |
Location of the convention |
DoubleTree by Hilton Denver, usa |
Period of the convention |
2024 |
Title of the review |
--
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Pages |
1 - 2 |
Item link |
http://hdl.handle.net/11311/1269142 |
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A 66.7fs-Integrated-Jitter Fractional-N Digital PLL Based on a Resistive-Inverse-Constant-Slope DTC (Show >>)(Hide <<)
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Author/s |
Salvi, Pietro; Dartizio, Simone M.; Rossoni, Michele; Tesolin, Francesco; Castoro, Giacomo; Lacaita, Andrea L.; Levantino, Salvatore |
Title of the convention |
2024 IEEE Custom Integrated Circuits Conference (CICC) |
Location of the convention |
Denver, CO, USA |
Period of the convention |
21/04/2024 - 24/04/2024 |
Title of the review |
--
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Pages |
1 - 2 |
Item link |
http://hdl.handle.net/11311/1267486 |
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A 79.3fsrms Jitter Fractional-N Digital PLL Based on a DTC Chopping Technique (Show >>)(Hide <<)
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Author/s |
Moleri, Riccardo; Dartizio, Simone Mattia; Rossoni, Michele; Castoro, Giacomo; Tesolin, Francesco; Cherniak, Dmytro; Samori, Carlo; Lacaita, Andrea Leonardo; Levantino, Salvatore |
Title of the convention |
2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) |
Location of the convention |
Honolulu, HI, USA |
Period of the convention |
16-20 June 2024 |
Title of the review |
--
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Pages |
1 - 2 |
Item link |
http://hdl.handle.net/11311/1272403 |
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Journal Articles |
A 10-GHz Digital-PLL-Based Chirp Generator With Parabolic Non-Uniform Digital Predistortion for FMCW Radars (Show >>)(Hide <<)
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Author/s |
Tesolin, Francesco; Dartizio, Simone M.; Castoro, Giacomo; Buccoleri, Francesco; Rossoni, Michele; Cherniak, Dmytro; Samori, Carlo; Lacaita, Andrea L.; Levantino, Salvatore |
Title of the review |
IEEE JOURNAL OF SOLID-STATE CIRCUITS (ISSN: 0018-9200) |
Volume |
59 |
Brochure |
12 |
Pages |
3915 - 3927 |
Item link |
http://hdl.handle.net/11311/1274102 |
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A Low-Jitter Fractional-$N$ Digital PLL Adopting a Reverse-Concavity Variable-Slope DTC (Show >>)(Hide <<)
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Author/s |
Rossoni, Michele; Dartizio, Simone M.; Tesolin, Francesco; Castoro, Giacomo; Dell'Orto, Riccardo; Lacaita, Andrea L.; Levantino, Salvatore |
Title of the review |
IEEE JOURNAL OF SOLID-STATE CIRCUITS (ISSN: 0018-9200) |
Volume |
PP |
Brochure |
-- |
Pages |
1 - 12 |
Item link |
http://hdl.handle.net/11311/1277246 |
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A Low-Noise Fractional-$N$ Digital PLL Using a Resistor-Based Inverse-Constant-Slope DTC (Show >>)(Hide <<)
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Author/s |
Salvi, Pietro; Dartizio, Simone M.; Rossoni, Michele; Tesolin, Francesco; Castoro, Giacomo; Lacaita, Andrea L.; Levantino, Salvatore |
Title of the review |
IEEE JOURNAL OF SOLID-STATE CIRCUITS (ISSN: 0018-9200) |
Volume |
[Online 2024] |
Brochure |
-- |
Pages |
1 - 13 |
Item link |
http://hdl.handle.net/11311/1278821 |
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List of publications and reserach products for the year 2023 (Show all details | Hide all details) |
Type |
Title of the Publicaiton/Product |
Conference proceedings |
4.3 A 76.7fs-lntegrated-Jitter and −71.9dBc In-Band Fractional-Spur Bang-Bang Digital PLL Based on an Inverse-Constant-Slope DTC and FCW Subtractive Dithering (Show >>)(Hide <<)
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Author/s |
Dartizio, Simone M.; Tesolin, Francesco; Castoro, Giacomo; Buccoleri, Francesco; Lanzoni, Luca; Rossoni, Michele; Cherniak, Dmytro; Bertulessi, Luca; Samori, Carlo; Lacaita, Andrea L.; Levantino, Salvatore |
Title of the convention |
2023 IEEE International Solid- State Circuits Conference (ISSCC) |
Location of the convention |
San Francisco (CA, USA) |
Title of the review |
--
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Pages |
3 - 5 |
Item link |
http://hdl.handle.net/11311/1233477 |
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4.5 A 9.25GHz Digital PLL with Fractional-Spur Cancellation Based on a Multi-DTC Topology (Show >>)(Hide <<)
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Author/s |
Castoro, Giacomo; Dartizio, Simone M.; Tesolin, Francesco; Buccoleri, Francesco; Rossoni, Michele; Cherniak, Dmytro; Bertulessi, Luca; Samori, Carlo; Lacaita, Andrea L.; Levantino, Salvatore |
Title of the convention |
2023 IEEE International Solid- State Circuits Conference (ISSCC) |
Location of the convention |
San Francisco (CA, USA) |
Title of the review |
--
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Pages |
82 - 84 |
Item link |
http://hdl.handle.net/11311/1233464 |
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A 2GS/s 11b 8x Interleaved ADC with 9.2 ENOB and 69.9dB SFDR in 28nm CMOS (Show >>)(Hide <<)
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Author/s |
Ricci, L.; Scaletti, L.; Be', G.; Rocco, M.; Bertulessi, L.; Levantino, S.; Lacaita, A.; Samori, C.; Bonfanti, A. |
Title of the convention |
VLSI Technology and Circuits |
Location of the convention |
Kyoto, Japan |
Period of the convention |
11/06/2023 - 16/06/2023 |
Title of the review |
--
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Pages |
1 - 2 |
Item link |
http://hdl.handle.net/11311/1248698 |
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Journal Articles |
A 72-fs-Total-Integrated-Jitter Two-Core Fractional-N Digital PLL With Digital Period Averaging Calibration on Frequency Quadrupler and True-in-Phase Combiner (Show >>)(Hide <<)
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Author/s |
Buccoleri, F; Dartizio, Sm; Tesolin, F; Avallone, L; Santiccioli, A; Iesurum, A; Steffan, G; Cherniak, D; Bertulessi, L; Bevilacqua, A; Samori, C; Lacaita, Al; Levantino, S |
Title of the review |
IEEE JOURNAL OF SOLID-STATE CIRCUITS (ISSN: 0018-9200) |
Volume |
58 |
Brochure |
3 |
Pages |
634 - 646 |
Item link |
http://hdl.handle.net/11311/1233414 |
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A Low-Spur and Low-Jitter Fractional-N Digital PLL Based on an Inverse-Constant-Slope DTC and FCW Subtractive Dithering (Show >>)(Hide <<)
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Author/s |
Dartizio, Sm; Tesolin, F; Castoro, G; Buccoleri, F; Rossoni, M; Cherniak, D; Samori, C; Lacaita, Al; Levantino, S |
Title of the review |
IEEE JOURNAL OF SOLID-STATE CIRCUITS (ISSN: 0018-9200) |
Volume |
58 |
Brochure |
12 |
Pages |
3320 - 3337 |
Item link |
http://hdl.handle.net/11311/1259046 |
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A Novel LO Phase-Shifting System Based on Digital Bang-Bang PLLs With Background Phase-Offset Correction for Integrated Phased Arrays (Show >>)(Hide <<)
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Author/s |
Tesolin, Francesco; Dartizio, Simone M.; Buccoleri, Francesco; Santiccioli, Alessio; Bertulessi, Luca; Samori, Carlo; Lacaita, Andrea L.; Levantino, Salvatore |
Title of the review |
IEEE JOURNAL OF SOLID-STATE CIRCUITS (ISSN: 0018-9200) |
Volume |
58 |
Brochure |
9 |
Pages |
2466 - 2477 |
Item link |
http://hdl.handle.net/11311/1245917 |
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Phase Noise Analysis of Periodically ON/OFF Switched Oscillators (Show >>)(Hide <<)
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Author/s |
Castoro, Giacomo; Dartizio, Simone M.; Lacaita, Andrea L.; Levantino, Salvatore |
Title of the review |
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS (ISSN: 1549-8328) |
Volume |
70 |
Brochure |
-- |
Pages |
54 - 63 |
Item link |
http://hdl.handle.net/11311/1221890 |
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List of publications and reserach products for the year 2022 (Show all details | Hide all details) |
Type |
Title of the Publicaiton/Product |
Conference proceedings |
A 68.6fs_rms-Total-integrated-Jitter and 1.5us-Locking-Time Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching (Show >>)(Hide <<)
|
Author/s |
Dartizio, S. M.; Buccoleri, F.; Tesolin, F.; Avallone, L.; Santiccioli, A.; Iesurum, A.; Steffan, G.; Cherniak, D.; Bertulessi, L.; Bevilacqua, A.; Samori, C.; Lacaita, A. L.; Levantino, S. |
Title of the convention |
2022 IEEE International Solid-State Circuits Conference, ISSCC 2022 |
Location of the convention |
usa |
Period of the convention |
2022 |
Title of the review |
--
|
Pages |
386 - 388 |
Item link |
http://hdl.handle.net/11311/1214731 |
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A 9GHz 72fs-Total-lntegrated-Jitter Fractional-N Digital PLL with Calibrated Frequency Quadrupler (Show >>)(Hide <<)
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Author/s |
Buccoleri, F.; Dartizio, S. M.; Tesolin, F.; Avallone, L.; Santiccioli, A.; Lesurum, A.; Steffan, G.; Bevilacqua, A.; Bertulessi, L.; Cherniak, D.; Samori, C.; Lacaita, A. L.; Levantino, S. |
Title of the convention |
43rd Annual IEEE Custom Integrated Circuits Conference, CICC 2022 |
Location of the convention |
usa |
Period of the convention |
2022 |
Title of the review |
--
|
Pages |
1 - 2 |
Item link |
http://hdl.handle.net/11311/1218504 |
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Investigation of the Statistical Spread of the Time-Dependent Dielectric Breakdown in Polymeric Dielectrics for Galvanic Isolation (Show >>)(Hide <<)
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Author/s |
Malavena, G.; Mazzola, J. L.; Greatti, M.; Monzio Compagnoni, C.; Lacaita, A. L.; Marano, V.; Lauria, M.; Paci, D.; Speroni, F.; Sottocornola Spinelli, A. |
Title of the convention |
4th IEEE Latin America Electron Devices Conference, LAEDC 2022 |
Location of the convention |
Puebla, Mexico |
Title of the review |
--
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Pages |
1 - 4 |
Item link |
http://hdl.handle.net/11311/1223561 |
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Journal Articles |
A 12.5-GHz Fractional-N Type-I Sampling PLL Achieving 58-fs Integrated Jitter (Show >>)(Hide <<)
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Author/s |
Mercandelli, Mario; Santiccioli, Alessio; Parisi, Angelo; Bertulessi, Luca; Cherniak, Dmytro; Lacaita, Andrea L.; Samori, Carlo; Levantino, Salvatore |
Title of the review |
IEEE JOURNAL OF SOLID-STATE CIRCUITS (ISSN: 0018-9200) |
Volume |
57 |
Brochure |
2 |
Pages |
505 - 517 |
Item link |
http://hdl.handle.net/11311/1190014 |
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A 12.9-to-15.1-GHz Digital PLL Based on a Bang-Bang Phase Detector With Adaptively Optimized Noise Shaping (Show >>)(Hide <<)
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Author/s |
Dartizio, Simone M.; Tesolin, Francesco; Mercandelli, Mario; Santiccioli, Alessio; Shehata, Abanob; Karman, Saleh; Bertulessi, Luca; Buccoleri, Francesco; Avallone, Luca; Parisi, Angelo; Lacaita, Andrea L.; Kennedy, Michael P.; Samori, Carlo; Levantino, Salvatore |
Title of the review |
IEEE JOURNAL OF SOLID-STATE CIRCUITS (ISSN: 0018-9200) |
Volume |
57 |
Brochure |
6 |
Pages |
1723 - 1735 |
Item link |
http://hdl.handle.net/11311/1187540 |
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A 900-MS/s SAR-based Time-Interleaved ADC with a Fully Programmable Interleaving Factor and On-Chip Scalable Background Calibrations (Show >>)(Hide <<)
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Author/s |
Be', G.; Parisi, A.; Bertulessi, L.; Ricci, L.; Scaletti, L.; Mercandelli, M.; Lacaita, A. L.; Levantino, S.; Samori, C.; Bonfanti, A. |
Title of the review |
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. II, EXPRESS BRIEFS (ISSN: 1549-7747) |
Volume |
69 |
Brochure |
9 |
Pages |
3645 - 3649 |
Item link |
http://hdl.handle.net/11311/1218501 |
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A Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching Achieving 68.6 fs-rms-Total-Integrated-Jitter and 1.56 μs-Locking-Time (Show >>)(Hide <<)
|
Author/s |
Dartizio, Simone M.; Buccoleri, Francesco; Tesolin, Francesco; Avallone, Luca; Santiccioli, Alessio; Iesurum, Agata; Steffan, Giovanni; Cherniak, Dmytro; Bertulessi, Luca; Bevilacqua, Andrea; Samori, Carlo; Lacaita, Andrea L.; Levantino, Salvatore |
Title of the review |
IEEE JOURNAL OF SOLID-STATE CIRCUITS (ISSN: 0018-9200) |
Volume |
57 |
Brochure |
12 |
Pages |
3538 - 3551 |
Item link |
http://hdl.handle.net/11311/1221889 |
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Analysis and Design of 8-to-101.6-GHz Injection-Locked Frequency Divider by Five With Concurrent Dual-Path Multi-Injection Topology (Show >>)(Hide <<)
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Author/s |
Garghetti, A.; Lacaita, A. L.; Seebacher, D.; Bassi, M.; Levantino, S. |
Title of the review |
IEEE JOURNAL OF SOLID-STATE CIRCUITS (ISSN: 0018-9200) |
Volume |
57 |
Brochure |
6 |
Pages |
1788 - 1799 |
Item link |
http://hdl.handle.net/11311/1195247 |
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Novel Feed-Forward Technique for Digital Bang-Bang PLL to Achieve Fast Lock and Low Phase Noise (Show >>)(Hide <<)
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Author/s |
Bertulessi, Luca; Cherniak, Dmytro; Mercandelli, Mario; Samori, Carlo; Lacaita, Andrea L.; Levantino, Salvatore |
Title of the review |
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS (ISSN: 1549-8328) |
Volume |
69 |
Brochure |
5 |
Pages |
1858 - 1870 |
Item link |
http://hdl.handle.net/11311/1198859 |
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List of publications and reserach products for the year 2021 (Show all details | Hide all details) |
Type |
Title of the Publicaiton/Product |
Conference proceedings |
32.8 A 98.4fs-Jitter 12.9-to-15.1GHz PLL-Based LO Phase-Shifting System with Digital Background Phase-Offset Correction for Integrated Phased Arrays (Show >>)(Hide <<)
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Author/s |
Santiccioli, A.; Mercandelli, M.; Dartizio, S. M.; Tesolin, F.; Karman, S.; Shehata, A.; Bertulessi, L.; Buccoleri, F.; Avallone, L.; Parisi, A.; Cherniak, D.; Lacaita, A. L.; Kennedy, M. P.; Samori, C.; Levantino, S. |
Title of the convention |
2021 IEEE International Solid-State Circuits Conference, ISSCC 2021 |
Location of the convention |
usa |
Period of the convention |
2021 |
Title of the review |
--
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Pages |
456 - 458 |
Item link |
http://hdl.handle.net/11311/1166752 |
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A 12.9-to-15.1GHz Digital PLL Based on a Bang-Bang Phase Detector with Adaptively Optimized Noise Shaping Achieving 107.6fs Integrated Jitter (Show >>)(Hide <<)
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Author/s |
Mercandelli, M.; Santiccioli, A.; Dartizio, S. M.; Shehata, A.; Tesolin, F.; Karman, S.; Bertulessi, L.; Buccoleri, F.; Avallone, L.; Parisi, A.; Lacaita, A. L.; Kennedy, M. P.; Samori, C.; Levantino, S. |
Title of the convention |
2021 IEEE International Solid-State Circuits Conference, ISSCC 2021 |
Location of the convention |
usa |
Period of the convention |
2021 |
Title of the review |
--
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Pages |
446 - 448 |
Item link |
http://hdl.handle.net/11311/1166753 |
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A 13.6-69.1GHz 5.6mW Ring-Type Injection-Locked Frequency Divider by Five with >20% Continuous Locking Range and Operation up to 101.6GHz in 28nm CMOS (Show >>)(Hide <<)
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Author/s |
Garghetti, Alessandro; Lacaita, ANDREA LEONARDO; Seebacher, David; Bassi, Matteo; Levantino, Salvatore |
Title of the convention |
2021 IEEE Custom Integrated Circuits Conference (CICC) |
Location of the convention |
Virtual |
Period of the convention |
April 25 - 30, 2021 |
Title of the review |
--
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Pages |
1 - 2 |
Item link |
http://hdl.handle.net/11311/1180528 |
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A PLL-Based Digital Technique for Orthogonal Correction of ADC Non-Linearity (Show >>)(Hide <<)
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Author/s |
Parisi, Angelo; Mercandelli, Mario; Samori, Carlo; Lacaita, ANDREA LEONARDO |
Title of the convention |
2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS) |
Location of the convention |
Dubai, United Arab Emirates |
Title of the review |
--
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Pages |
1 - 4 |
Item link |
http://hdl.handle.net/11311/1194538 |
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High-Density Solid-State Storage: A Long Path to Success (Show >>)(Hide <<)
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Author/s |
Lacaita, A. L.; Sottocornola Spinelli, A.; Monzio Compagnoni, C. |
Title of the convention |
IEEE Latin America Electron Devices Conference (LAEDC) |
Location of the convention |
Virtual Conference |
Period of the convention |
19/04/2021 - 21/04/2021 |
Title of the review |
--
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Pages |
1 - 4 |
Item link |
http://hdl.handle.net/11311/1174552 |
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Journal Articles |
A Generalization of the Groszkowski’s Result in Differential Oscillator Topologies (Show >>)(Hide <<)
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Author/s |
Buccoleri, Francesco; Lacaita, ANDREA LEONARDO; Bonfanti, ANDREA GIOVANNI |
Title of the review |
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS (ISSN: 1558-0806) |
Volume |
68 |
Brochure |
7 |
Pages |
2800 - 2812 |
Item link |
http://hdl.handle.net/11311/1176919 |
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Author/s |
Sottocornola Spinelli, A.; Malavena, G.; Lacaita, A. L.; Monzio Compagnoni, C. |
Title of the review |
MICROMACHINES (ISSN: 2072-666X) |
Volume |
12 |
Brochure |
6 |
Pages |
703 - 716 |
Item link |
http://hdl.handle.net/11311/1187104 |
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Self-Biasing Dynamic Start-up Circuit for Current-Biased Class-C Oscillators (Show >>)(Hide <<)
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Author/s |
Parisi, A.; Tesolin, F.; Mercandelli, M.; Bertulessi, L.; Lacaita, A. L. |
Title of the review |
IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS (ISSN: 1531-1309) |
Volume |
31 |
Brochure |
9 |
Pages |
1075 - 1078 |
Item link |
http://hdl.handle.net/11311/1183571 |
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