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Information on didactic, research and institutional assignments on this page are certified by the University; more information, prepared by the lecturer, are available on the personal web page and in the curriculum vitae indicated on this webpage.
Information
LecturerFornaciari William
QualificationAssociate professor full time
Belonging DepartmentDipartimento di Elettronica, Informazione e Bioingegneria
Scientific-Disciplinary SectorIINF-05/A - Information Processing Systems
Curriculum VitaeDownload CV (572.04Kb - 10/10/2024)
OrcIDhttps://orcid.org/0000-0001-8294-730X

Contacts
Office hours
DepartmentFloorOfficeDayTimetableTelephoneFaxNotes
DEIB1117WednesdayFrom 08:30
To 10:00
+390223993504+390223993411It is better to use email/teams or to schedule an appointment, I am available also on Teams/webex/Zoom
E-mailwilliam.fornaciari@polimi.it
Personal websitehttps://fornaciari.faculty.polimi.it/

Data source: RE.PUBLIC@POLIMI - Research Publications at Politecnico di Milano

List of publications and reserach products for the year 2025 (Show all details | Hide all details)
Type Title of the Publicaiton/Product
Conference proceedings
PMDI: An AI-Enabled Ecosystem for Cooperative Urban Mobility (Show >>)
Journal Articles
Calibration-free feedforward temperature compensation for wireless clock synchronisation (Show >>)
Laser Fault Injection Methodology for Software Reliability Testing (Show >>)


List of publications and reserach products for the year 2024 (Show all details | Hide all details)
Type Title of the Publicaiton/Product
Poster
Protecting Safety-Critical Systems: a Software Approach (Show >>)
Conference proceedings
ML-Assisted Attack Detection on NoC-Based Many-Cores Through On-Chip Traffic Monitoring (Show >>)
The Impact of Run-Time Variability on Side-Channel Attacks Targeting FPGAs (Show >>)
The TEXTAROSSA Project: Cool all the Way Down to the Hardware (Show >>)
Towards Certifiable Software-Implemented Hardware Fault Tolerance (Show >>)
VOICE: Value-of-Information for Compute Continuum Ecosystems (Show >>)
Journal Articles
Enhanced Compiler Technology for Software-based Hardware Fault Detection (Show >>)


List of publications and reserach products for the year 2023 (Show all details | Hide all details)
Type Title of the Publicaiton/Product
Abstract in Atti di convegno
JNP: Software Fault Tolerance in Real-Time Systems: Identifying the Future Research Questions (Show >>)
Poster Abstract: Run-time Dynamic WCET Estimation (Show >>)
Conference proceedings
An Evaluation of the State-Of-The-Art Software and Hardware Implementations of BIKE (Show >>)
Dynamic Power Consumption of the Full Posit Processing Unit: Analysis and Experiments (Show >>)
Efficient control-oriented modelling of heterogeneous large-scale computer cooling systems (Show >>)
Hardware and Software Support for Mixed Precision Computing: A Roadmap for Embedded and HPC Systems (Show >>)
Mixed-Criticality with Integer Multiple WCETs and Dropping Relations: New Scheduling Challenges (Show >>)
Object-oriented modelling of advanced computer cooling solutions (Show >>)
RISC-V Processor Technologies for Aerospace Applications in the ISOLDE Project (Show >>)
RISC-V-Based Platforms for HPC: Analyzing Non-functional Properties for Future HPC and Big-Data Clusters (Show >>)
Wireless synchronisation as a control problem embedded in new-generation networked automation systems (Show >>)
Journal Articles
A survey on run-time power monitors at the edge (Show >>)
FCPP+Miosix: Scaling Aggregate Programming to Embedded Systems (Show >>)
Modelling and Simulation Challenges and Solutions in Cooling Systems for Nanoscale Integrated Circuits (Show >>)
Reliability-oriented resource management for High-Performance Computing (Show >>)
Sema-IIoVT: Emergent Semantic-Based Trustworthy Information-Centric Fog System and Testbed for Intelligent Internet of Vehicles (Show >>)
Software Fault Tolerance in Real-Time Systems: Identifying the Future Research Questions (Show >>)


List of publications and reserach products for the year 2022 (Show all details | Hide all details)
Type Title of the Publicaiton/Product
Abstract in Atti di convegno
ScaDL 2022 Invited Talk 1: Design of secure power monitors for accelerators, by exploiting ML techniques, in the Euro-HPC TEXTAROSSA project (Show >>)
Conference proceedings
A Mixed-Criticality Approach to Fault Tolerance: Integrating Schedulability and Failure Requirements (Show >>)
FPGA implementation of BIKE for quantum-resistant TLS (Show >>)
Feedforward temperature compensation in sub-microsecond wireless clock synchronisation (Show >>)
On the Effectiveness of True Random Number Generators Implemented on FPGAs (Show >>)
On the use of hardware accelerators in QC-MDPC code-based cryptography (Show >>)
The TEXTAROSSA Approach to Thermal Control of Future HPC Systems (Show >>)
Journal Articles
BarMan: a Run-Time Management Framework in the Resource Continuum (Show >>)
Design of side-channel resistant power monitors (Show >>)
Towards EXtreme scale technologies and accelerators for euROhpc hw/Sw supercomputing applications for exascale: The TEXTAROSSA approach (Show >>)


List of publications and reserach products for the year 2021 (Show all details | Hide all details)
Type Title of the Publicaiton/Product
Patents
A COMPUTING PLATFORM AND METHOD FOR SYNCHRONIZE THE PROTOTYPE EXECUTION AND SIMULATION OF HARDWARE DEVICE (Show >>)
A COMPUTING PLATFORM FOR PREVENTING SIDE CHANNEL ATTACKS (Show >>)
Conference proceedings
A Multi-Level DPM Approach for Real-Time DAG Tasks in Heterogeneous Processors (Show >>)
Event-Based Control Enters the Real-Time World: Perspectives and Pitfalls (Show >>)
Integrating Side Channel Security in the FPGA Hardware Design Flow (Show >>)
Managing the Resource Continuum in a Real Video Surveillance Scenario (Show >>)
TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale (Show >>)
The Italian research on HPC key technologies across EuroHPC (Show >>)
Work-in-Progress: Run-time pWCET Estimation and Quality Monitoring (Show >>)
Journal Articles
3D-ICE 3.0: efficient nonlinear MPSoC thermal simulation with pluggable heat sink models (Show >>)
An FPU design template to optimize the accuracy-efficiency-area trade-off (Show >>)
Automatic identification and hardware implementation of a resource-constrained power model for embedded systems (Show >>)
manifesti v. 3.9.3 / 3.9.3
Area Servizi ICT
27/04/2025